When an NMOS transistor exhibits a tensile-stressed channel, the mobility of the carriers increases as does the current drawn, thereby increasing transistor performance. On the other hand, a tensile-stressed channel degrades the performance of a PMOS transistor especially as regards the mobility of the holes which decreases.
Today, in so-called “massive substrate” technologies, techniques exist for tensile-stressing the channels of NMOS transistors.
Substrates of the SOI type also exist, in which the silicon film, which rests on the buried insulating layer supported by a silicon support substrate, for example a trough, is already tensile-stressed. But, though this is advantageous for the production of NMOS transistors, it presents a drawback for the production of PMOS transistors.